Our customer requires adding an external read-protection mechanism for the code flash area.
I only see flash write protection in the TRM manual.
How should read protection be implemented?
Our customer requires adding an external read-protection mechanism for the code flash area.
I only see flash write protection in the TRM manual.
How should read protection be implemented?
Implementing read protection for the code storage area can be achieved by combining hardware-level mechanisms with encryption technology. Taking the STM32 series as an example, it can be done by setting the Read Protection (RDP) level in the option bytes. For instance:
RDP Level 1: Disables the debug interface (JTAG/SWD), prevents access to Flash when booting from SRAM or system memory, and only allows the chip’s own program to read.
RDP Level 2: Further fuses the debug interface, completely prohibits any external access, and is irreversible.
At the same time, fuse bits (such as the SPIEN bit in AVR) can be used to disable the programming interface, preventing Flash from being read via ISP. If higher security is required, a hardware encryption module (such as HSM) can be integrated, and the Flash content can be encrypted using AES/SM4 algorithms, with the key stored in an external secure chip.
For external read-protection requirements, the following approaches can be used:
Combine the above methods according to the specific MCU model and security requirements, and consult the security chapters in the vendor’s TRM (e.g., STM32 Option Bytes configuration procedure).