Flyback Power Supply Parameter Calculation and Component Selection, Flyback Transformer Calculation and Winding Tutorial

Technical Discussion Power Electronics
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This article uses a 72W flyback power supply with a wide input voltage range of 24V/3A output as an example to calculate circuit parameters and component selection, including the calculation and winding method of the flyback transformer.

The formulas in this article are referenced from online sources.

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Flyback Power Supply Operating Parameters

First, determine the parameters of the flyback power supply you intend to design.

Parameter Value
Rated input voltage V_{acnom} 220VAC
Minimum input voltage V_{acmin} 85VAC
Maximum input voltage V_{acmax} 265VAC
Mains frequency f_L 50Hz
Output voltage V_{out} 24V
Output current I_{out} 3A
Operating frequency f_s 150kHz
Design efficiency η 85%

The operating frequency of a flyback power supply is typically customized by the designer according to specific application requirements, rather than being fixed. Increasing the operating frequency significantly reduces the size and weight of the transformer, output filter inductor, and capacitor, thereby reducing the overall power supply size, as high-frequency operation allows the use of smaller magnetic components and capacitors. However, higher frequencies also increase switching losses, potentially reducing efficiency, exacerbating heat generation, and requiring more complex thermal management. Therefore, frequency selection must balance size, efficiency, cost, and thermal considerations.

Typical operating frequency ranges from 20 kHz to 500 kHz, with 50 kHz to 200 kHz being the most common application range, balancing size reduction and loss control. For designs exceeding 300 kHz, traditional silicon-based switching devices (e.g., MOSFETs) exhibit significantly increased crossover losses; in such cases, wide-bandgap semiconductor switches such as gallium nitride (GaN) or silicon carbide (SiC) are typically used to reduce losses and maintain high efficiency.

Single-Phase Rectifier and Filter Circuit Calculation

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Rectifier Diode Voltage Rating Calculation:

The DC bus voltage after rectification and filtering is typically close to the peak value of the input AC voltage, where the peak voltage is \\sqrt{2} times the RMS value. Therefore, the reverse voltage rating of the rectifier bridge diodes must exceed \\sqrt{2} times the maximum input AC voltage:

V_{busmax} = \\sqrt{2} \\cdot V_{acmax} = 374.77 \\mathrm{V}

To account for grid surges and voltage fluctuations, a safety margin coefficient K_{bri} (typically 1.5) is applied:

V_{busmax} \\cdot K_{bri} = 562.15 \\mathrm{V}

Thus, the reverse voltage rating of the rectifier bridge diodes should be at least 562 V.

Input Power:

P_{in} = \\frac{P_{out}}{η} = 84.7 \\mathrm{W}

Rectifier Diode Current Rating Calculation:

Maximum current through a single diode in the rectifier bridge (since two diodes conduct alternately, divide by 2):

I_{acmax} = \\frac{P_{in}}{2 \\cdot V_{acmin}} = 0.498 \\mathrm{A}

Applying the same safety margin coefficient K_{bri} = 1.5:

I_{acmax} \\cdot K_{bri} = 0.747 \\mathrm{A}

Thus, the rated current of each rectifier diode should be at least 0.747 A.

Based on the above calculations, the selected rectifier bridge model is MSB40M, with a rated voltage of 1000V and rated current of 4A, satisfying the above design requirements.

Input Filter Capacitor Calculation:

There is an empirical formula for selecting the input capacitor in a flyback power supply:

  • For 220VAC single-voltage input: select 1–2 μF/W
  • For full-voltage input (85VAC–265VAC): select 2–3 μF/W

Using the empirical formula:

C_{in} = 2 \\cdot P_{out} = 144 \\mathrm{μF}

Thus, a 150 μF electrolytic capacitor can be selected.

Input Filter Capacitor Voltage Rating Selection:

The voltage rating should exceed the peak input AC voltage. Since V_{busmax} = 374.77 \\, \\text{V} here, a 400V or 450V capacitor is suitable.

Flyback Transformer Calculation

For margin, assume the minimum input bus voltage V_{busms} as 110V.

Define the reflected voltage V_{OR} (the voltage induced across the primary winding when the switch turns off due to magnetic energy release) as 100V—a typical engineering value for wide-input-voltage applications (e.g., 110V/220V AC).

Define the MOSFET drain-source voltage drop during turn-on as V_{ds} = 4 \\, \\text{V}.

Calculate Maximum Duty Cycle:
(Alternatively, a typical value of 0.45 may be directly used; flyback duty cycles generally do not exceed 0.5.)

V_{busmin} = \\sqrt{2} \\cdot V_{acmin} = 120.21 \\mathrm{V}
D_{max} = \\frac{V_{OR}}{V_{OR} + V_{busms} - V_{ds}} = 0.485

Calculate Primary Peak Current:

  • Average input current:
I_{avg} = \\frac{P_{in}}{V_{busms}} = 0.77 \\mathrm{A}
  • Assuming a ripple current ratio K_{RP} of 0.8 (CCM mode), calculate the primary peak current I_P:
I_P = \\frac{I_{avg}}{(1-0.5 \\cdot K_{RP}) \\cdot D_{max}} = 2.644 \\mathrm{A}

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Calculate Transformer Magnetizing Inductance:

  • The formula for magnetizing inductance on the primary side yields L_P:
L_P = \\frac{P_{out}}{{I_P}^{2} \\cdot K_{RP} \\cdot (1 - 0.5 \\cdot K_{RP}) \\cdot f_s} \\cdot \\frac{0.5 \\cdot (1-\\eta) + \\eta}{\\eta} = 155.686 \\mathrm{μH}

Calculate AP Value and Select Transformer Core:

Core area product A_P = A_W \\cdot A_e (product of window area A_W and effective core cross-sectional area A_e).

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  • Assume winding window fill factor K_o = 0.4, current density factor K_j = 3.95, and flux density B_w = 0.2 \\, \\text{T}. Calculate the minimum required A_P:
A_{P}=\\left(\\frac{L_{P} \\cdot {I_{P}}^{2} \\cdot 10^{2}}{B_{w} \\cdot K_{o} \\cdot K_{j}}\\right)^{1.14}=0.297 \\mathrm{~cm}^{4}
  • The selected core’s A_P should typically be more than twice the calculated value. Here, the PQ2620 core is selected, with a published A_P = 0.7188 \\, \\mathrm{cm}^4.

Why is B_w chosen as 0.2 T?

1. Avoid Core Saturation

  • Core Saturation: When flux density exceeds the material’s saturation flux density (B_{\\text{sat}}), the core loses permeability, inductance collapses, and the transformer fails.
  • Ferrite Core Characteristics: Common switch-mode power supply cores (e.g., PC40, PC44, PC95) have B_{\\text{sat}} \\approx 0.3–0.4 \\, \\text{T} at 100°C.
  • Safety Margin: Choosing B_w = 0.2 \\, \\text{T} (50–70% of B_{\\text{sat}}) provides margin for:
    • Reduced B_{\\text{sat}} at high temperatures (ferrite B_{\\text{sat}} decreases with temperature).
    • DC bias current causing flux offset.
    • Input voltage fluctuations or load transients increasing peak current.

2. Control Core Losses

  • High-Frequency Losses: Switching frequencies >20 kHz cause core losses (hysteresis + eddy current) to increase exponentially with flux density.
  • Loss Optimization: Experience shows that B_w in the 0.1–0.25 T range balances core and copper losses for optimal overall efficiency. 0.2 T is a commonly used compromise.

Calculate Primary and Secondary Winding Turns:

Let V_F = forward voltage drop of output rectifier diode = 0.7 V.

  • Using magnetic flux conservation, calculate the turns ratio N_{PS}:
N_{PS} = \\frac{D_{max}}{(1 - D_{max})} \\cdot \\frac{(V_{busms} - V_{ds})}{(V_{out} + V_F)} = 4.049
  • To prevent core saturation, select operating B_{max} = 0.15 \\, \\text{T}. For PQ2620 core, A_e = 119 \\, \\mu\\text{m}^2 (119 \\times 10^{-6} \\, \\text{m}^2). Calculate primary turns N_P:
N_P = \\frac{V_{busms} \\cdot D_{max}}{A_e \\cdot B_{max} \\cdot f_s} = 20

(Magnetic flux linkage: \\Psi = N \\cdot B \\cdot S)

  • Calculate secondary turns N_S based on turns ratio:
N_S = \\frac{N_P}{N_{PS}} = 5
  • Add an auxiliary winding to power the control IC, with output voltage V_{out1} = 15 \\, \\text{V}. Calculate auxiliary winding turns N_{s1}:
N_{s1} = N_s \\cdot \\frac{V_{out1}}{V_{out}} = 3

Calculate Primary and Secondary Winding Wire Diameter and Strands:

  • Calculate primary RMS current I_{prms}:
I_{prms} = I_P \\cdot \\sqrt{D_{max} \\cdot \\left( \\frac{{K_{RP}}^2}{3} - K_{RP} + 1 \\right)} = 1.184\\,\\text{A}
  • Calculate secondary peak current I_{SP}:
I_{SP} = I_P \\cdot \\frac{N_P}{N_S} = 10.575\\,\\text{A}
  • Calculate secondary RMS current I_{srms}:
I_{srms} = I_{SP} \\cdot \\sqrt{(1 - D_{max}) \\cdot \\left( \\frac{{K_{RP}}^2}{3} - K_{RP} + 1 \\right)} = 4.877\\,\\text{A}

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  • Transformer windings carry high-frequency current, subject to the skin effect: current flows primarily near the conductor surface, reducing effective cross-section. To mitigate this, use multiple thin strands (Litz wire) instead of a single thick wire. Calculate skin depth D_m:
D_{m}=\\frac{2 \\cdot 68.85 \\cdot 10^{-3}}{\\sqrt{f_{s}}}=0.356\\,\\text{mm}
  • Typical current density: 4 \\sim 6 \\,\\text{A/mm}^2. Select primary wire diameter and strand count:
D_p = 0.3\\,\\text{mm} \\quad\\quad P_p=3
  • Primary current density:
j_p = \\frac{I_{prms}}{\\left( \\frac{D_p}{2} \\right)^2 \\pi P_p} = 5.585 \\times 10^6 \\text{A/m}^2 = 5.585\\,\\text{A/mm}^2
  • Select secondary wire diameter and strand count:
D_s = 0.35\\,\\text{mm} \\quad\\quad P_s = 10
  • Secondary current density:
j_s = \\frac{I_{srms}}{\\left( \\frac{D_s}{2} \\right)^2 \\pi P_s} = 5.069 \\times 10^6 \\text{A/m}^2 = 5.069\\,\\text{A/mm}^2

Calculate Reference Coefficients:

  • Total winding cross-sectional area occupying the window:
A_w = 60.4 \\times 10^{-3}\\,\\text{m}^2
K_w = \\frac{\\left( \\frac{D_p}{2} \\right)^2 \\pi P_p N_p + \\left( \\frac{D_s}{2} \\right)^2 \\pi P_s N_S}{A_w} = 0.15

Window fill factor K_w is typically kept between 0.1 and 0.3.

Transformer Manufacturing Specification

After calculating transformer parameters, prepare a manufacturing specification for the transformer manufacturer, or wind it manually.

Winding Structure:| Winding Layer | Output Terminal | Winding Specification | Turns | Winding Method |
| :------------: | :------------: | :-------------------: | :–: | :------------: |
| First Layer | 1-2 | Φ0.3mm (#28AWG) × 3 strands in parallel | 10 | Tight Winding |
| Second Layer | 5-6 | Φ0.3mm (#28AWG) | 3 | Tight Winding |
| Third Layer | 10-12 | Φ0.35mm (#26AWG) × 10 strands in parallel | 5 | Tight Winding |
| Fourth Layer | 2-3 | Φ0.3mm (#28AWG) × 3 strands in parallel | 10 | Tight Winding |

Winding Details Notes:

  1. Strictly follow the schematic’s pin polarity: pins 1, 5, and 10 are the same polarity terminals; pay attention to polarity during winding.
  2. Pin 2 is the sandwich winding transition point.
  3. Add tape between each layer; add a 2mm or greater barrier on the edges between layers 2 and 3.
  4. Use heat-shrink tubing on all lead entry/exit points.
  5. Mark pin 1 with a white dot to ensure inductance of 156μH (measured between pins 1–3 @ 150kHz).
  6. Wind each layer evenly; if insufficient for a full layer, wind loosely and evenly.
  7. Remove pin 8.

Transformer Pinout, Polarity Diagram, and Winding Structure:

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Transformer Specifications:

Parameter Specification
Inductance 1–3 pins: Grind center post to ensure 156μH (@150kHz measurement)
Core PQ2620 (PC95/PC44 Ferrite)
Bobbin PQ2620_6PIN+6PIN Vertical Bobbin
Base Plate None
Dielectric Test Pins 1–10: 1500VAC (60Hz, 60s duration)
Temperature Class CLASS F
Mounting Fixed with tape; no potting or varnish coating yet
Lead Exit All input/output leads use Teflon or nylon insulation tubing

MOSFET Calculation and Selection

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  • During the primary MOSFET turn-off period, the drain-source voltage equals the sum of the input voltage and the reflected secondary voltage. The maximum platform voltage occurs at maximum input voltage:
V_{mos} = (V_F + V_{out}) \frac{N_P}{N_S} + V_{busmax} = 473.567\,\text{V}

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  • When the MOSFET turns off, due to the presence of primary leakage inductance in the transformer, energy stored in the leakage inductance is not transferred to the secondary side. The MOSFET’s output capacitance (C_{oss}) interacts with this leakage inductance, forming an LC oscillation that generates a voltage spike.
  • To prevent damage to the MOSFET, a dedicated RCD clamp circuit is typically designed to absorb the spike energy. Additionally, the selected MOSFET must have sufficient voltage margin. In this design, a 1.5× margin is applied: K_{vmos} = 1.3.
  • Therefore, the required MOSFET breakdown voltage must satisfy: V_{mos} \cdot K_{vmos} = 615.637\,\text{V}
  • The RMS current of the MOSFET equals the primary RMS current, previously calculated as I_{prms} = 1.184\,\text{A}. A margin should be added, so select a MOSFET with a higher rated current.

Based on the minimum required breakdown voltage and primary RMS current I_{prms}, the selected MOSFET model is NJH65R600S, with a rated voltage of 700V and rated current of 8A, satisfying the above design requirements.

Note: Check the table below — the rated current at 100°C must also exceed the calculated primary RMS current.

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Besides voltage and current ratings, key MOSFET selection parameters include on-resistance R_{DS(ON)} and input capacitance C_{iss} — both should be as low as possible. Lower R_{DS(ON)} reduces conduction losses. Lower C_{iss} directly reduces switching and drive losses: smaller C_{iss} enables faster switching, reduces switching losses, and requires less drive current, lowering drive circuit losses.

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Output Diode and Capacitor Calculation and Selection

Output Diode Calculation and Selection:

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  • During MOSFET conduction, the secondary rectifier diode is reverse-biased and off. The reverse voltage across the diode equals the output voltage plus the voltage reflected from the primary winding to the secondary. The maximum reverse voltage occurs at maximum input voltage:
V_{dio} = V_{out} + V_{busmax} \cdot \frac{N_S}{N_P} = 117.692\,\text{V}

  • When the diode turns off, due to secondary winding leakage inductance, energy stored in the leakage inductance interacts with the diode’s junction capacitance, generating a voltage spike during turn-off. Select a diode with sufficient voltage margin; in this design, a 1.5× margin is applied: K_{vdio} = 1.5.

  • Therefore, the required diode breakdown voltage must satisfy:

V_{dio} \cdot K_{vdio} = 176.5372\,\text{V}

  • Based on the calculated minimum breakdown voltage and secondary RMS current I_{srms}, the selected diode model is SBDD10200CT, with a rated voltage of 200V and rated current of 10A, satisfying the above requirements.

  • Additionally, Schottky diodes must be used because they feature a low forward voltage drop (V_f), significantly reducing conduction losses and improving efficiency. Their extremely short reverse recovery time (typically <10ns) reduces switching losses and voltage oscillations, making them ideal for high-frequency flyback converters.

  • Alternatively, synchronous rectification (integrating a synchronous rectifier controller + MOSFET) can replace Schottky diodes. Synchronous rectification uses a MOSFET instead of a diode, controlled precisely by a controller. Its advantage lies in an extremely low on-resistance (R_{ds(on)}), further reducing voltage drop and losses, enhancing efficiency — especially under high-output-current conditions.

Output Capacitor Calculation and Selection:

  • When the MOSFET turns on, the secondary diode turns off, and the output capacitor supplies the load, causing the output voltage to gradually drop, forming output voltage ripple.
  • The capacitor current equals the load current. The rate of voltage drop equals capacitor current divided by capacitance.
  • Ripple voltage equals the voltage drop rate multiplied by the MOSFET on-time (i.e., the secondary diode off-time):
\Delta V_{out} = \frac{V_{out}}{R_{out} \cdot C_{out}} \cdot \frac{D_{max}}{f_s}
  • For consumer electronics switching power supplies, output voltage ripple (peak-to-peak ripple voltage as percentage of output voltage) is typically required to be ≤1–2%. For a 24V output, this means ripple voltage should be between 0.24V and 0.48V. Lower ripple is acceptable but requires larger capacitance. Here, we set \Delta V_{out} = 0.1\,\text{V}. Thus, output capacitance can be calculated as:
R_{out} = \frac{V_{out}}{I_{out}} = 8\,\text{Ω}
C_{out} = \frac{V_{out}}{R_{out} \cdot \Delta V_{out}} \cdot \frac{D_{max}}{f_s} = 97.087\,\text{μF}
  • This is the ideal capacitance assuming zero ESR. In practice, real capacitors have equivalent series resistance (ESR), which increases ripple. Different capacitor types have different ESR values; typically, a practical value exceeds the theoretical value, and selection should be verified experimentally.
  • To reduce ESR, use multiple capacitors in parallel. In this design, two 220μF/35V electrolytic capacitors are used in parallel. Solid capacitors (lower ESR than electrolytics) may be selected, and multiple MLCC capacitors (e.g., 1μF, 100nF) should be added in parallel to filter high-frequency noise.

RCD Clamp Circuit Analysis and Calculation

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  • The circuit may experience two oscillations: the first is caused by primary leakage inductance L_{kp} and MOSFET output capacitance C_{oss}; the second occurs after energy depletion, when magnetizing inductance (primary inductance) and C_{oss} oscillate.

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  • After adding the RCD clamp circuit, when the voltage across the MOSFET exceeds the sum of the clamp capacitor voltage and the input voltage, the clamp diode conducts and the clamp circuit activates.

  • Assume the primary leakage inductance L_k is controlled within 1% of the magnetizing inductance (primary inductance): L_k = 1\% \cdot L_p = 1.557\,\mu\text{H} (ideally, measure the actual primary leakage inductance after transformer production and recalculate using the measured value. To measure primary leakage inductance: short all secondary windings and measure primary inductance using an LCR meter; the result is the primary leakage inductance).

  • Given the maximum MOSFET drain-source voltage V_{dsmax} = 700\,\text{V}

  • With margin, design target clamp capacitor voltage V_{clamp} is:

V_{clamp} = 0.8 \cdot V_{dsmax} - V_{busmax} = 185.233\,\text{V}
  • Using standard RCD clamp calculation formulas, calculate clamp resistor R_c and clamp capacitor C_c:
R_c = \frac{2 \cdot \left[V_{clamp} - \frac{N_P}{N_S} \cdot (V_F + V_{out})\right] \cdot V_{clamp}}{L_k \cdot I_p^2 \cdot f_s} = 19.616\,\text{kΩ}
C_c = \frac{2 \cdot V_{clamp}}{R_c \cdot V_{clamp} \cdot f_s} = 0.68\,\text{nF}
  • Clamp power is calculated as:
P_{clamp} = \frac{1}{2} \cdot f_s \cdot L_k \cdot I_p^2 \left(1 + \frac{V_{OR}}{V_{clamp} - V_{OR}}\right) = 1.774\,\text{W}
  • Select a 20kΩ clamp resistor and a 1nF clamp capacitor; use a 2W power resistor. Considering the initial startup voltage on the clamp capacitor, select a 1kV-rated film capacitor or 1206-package MLCC. Similarly, select a 1kV-rated clamp diode FR107.

Document Downloads

If manual calculation is not preferred, you may use Mathcad calculation sheets or SMPSKit software:

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Transformer Winding

I am also new to winding transformers — my results are not perfect;仅供参考.

All windings must start from the same-polarity pin and wind in the same direction!

The images below show winding with enameled wire (left) and Litz wire (right).

The PQ2620 core has a diameter of 14.5mm. Using the circumference formula L = \pi d, one turn length is 45.53mm. Multiply by turns to get required wire length per layer, then add 10–20cm extra.

First Layer: Wind the first primary layer. Bundle three 0.3mm enameled wires together and wind 10 turns starting from pin 1 on the bobbin. (For Litz wire, I used 0.1mm × 30 strands.)

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After wrapping the first layer, route the wire to the top first, then wrap one layer of tape (use Mala tape or Polyimide tape), then route the wire vertically down to pin 2 and wrap two layers of tape.

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Second Layer: First, create baffles on both sides. Then wind a single 0.3mm enameled wire around pin 5, following the winding direction of the first layer, for 3 turns to pin 6, and finally wrap two layers of tape. (I used 0.1x10 Litz wire.)

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Third Layer: First, create baffles on both sides. Then wind ten 0.35mm enameled wires together around pin 10 of the transformer bobbin, following the winding direction of the first layer, for 5 turns to pin 12, and finally wrap two layers of tape. (I used 0.1x60 Litz wire.)

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Fourth Layer: Continue winding the primary coil, starting from pin 2 and following the winding direction of the first layer for 10 turns to pin 3. After completing, it’s best to route the wire vertically downward, then wrap two layers of tape.

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Next, solder all the enameled wires to their respective pins. Some enameled wires may require you to scrape off the enamel coating with a blade before soldering. For Litz wire, simply apply the soldering iron at high temperature for a while to allow solder to adhere.

In a flyback switch-mode power supply, the transformer must store the energy transmitted during each cycle. To prevent magnetic saturation, an air gap is typically introduced into the magnetic core to alter the hysteresis loop, increasing the saturation magnetic field strength and thereby increasing the energy transmitted per cycle. Air gap creation typically involves two methods: grinding the air gap or inserting spacers; the latter is simpler.

Finally, reassemble the magnetic core, press it tightly, and measure the primary coil inductance. If the inductance is significantly higher than the target value (here, I require 156μH), use a file or other grinding tool to carefully grind the central cylindrical portion of the core (grinding the air gap). Measure after each small adjustment until the inductance is only slightly above the target, then tightly wrap the entire core with tape.

Alternatively, you can use the spacer method: place several layers of tape or other thin paper on both sides of the core. After adding each layer, measure the inductance until it is only slightly above the target value, then tightly wrap the entire core with tape.

The spacer method results in slightly higher leakage inductance compared to grinding.

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After completion, measure again. My transformer’s primary coil inductance is 158.8μH.

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To measure the primary coil leakage inductance, short all other windings and measure the inductance of the primary coil—it will be the leakage inductance. Mine measured 2.7μH, slightly higher than desired.

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English Version of the Article: https://blog.zeruns.top/archives/73.html

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