[Open Source] 24V 3A Flyback Switching Power Supply (Based on UC3842, Including Circuit and Transformer Parameter Calculation)

Project Practice Open-Source Project
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Open-sourcing a wide-input-voltage, 24V3A output flyback switch-mode power supply (Flyback Power Supply), 72-watt power, up to 87.4% efficiency, based on the UC3842 chip with synchronous rectification (UCC24612-1DB), including detailed calculation processes for circuit and transformer parameters, schematic diagrams, PCB layout, PSIM simulation model, transformer manufacturing specification, and more.

Preface

:round_pushpin: This is my first attempt at designing a flyback power supply. Please feel free to point out any areas that could be improved or corrected.

:rocket: Also, I’m currently looking for job opportunities — any employers in Guangzhou, Foshan, or Shenzhen who are hiring, please consider me! You can check out my open-source projects on my LCSC Open Source Platform profile: https://oshwhub.com/zeruns/works

Project video demonstration: https://www.bilibili.com/video/BV1ES4GzQE19/
LCSC Open Source Platform link: https://oshwhub.com/zeruns/24v3a-Flyback-Power-Supply-uc384x
Electronics/MCU Technical Discussion QQ Group: 2169025065
Download links for all design files are at the end of this article!

:warning: Warning: Building switch-mode power supplies involves significant risks. I do not guarantee the accuracy of any circuits, parameters, or formulas provided in this design. Replicating or referencing this project is done entirely at your own risk.

Estimated unit cost for small batch production (20 units): ~¥25 (excluding PCB and transformer, calculated using component prices from LCSC Mall). Including PCB and transformer, total cost should remain under ¥50.

Design Specifications

Parameter Value
Nominal Input Voltage V_{acnom} 220VAC
Minimum Input Voltage V_{acmin} 85VAC
Maximum Input Voltage V_{acmax} 265VAC
Line Frequency f_L 50Hz
Output Voltage V_{out} 24V
Output Current I_{out} 3A
Switching Frequency f_s 150kHz
Target Efficiency η 85%

PCB Dimensions: 100 x 55 mm
PCB Specification: Double-layer board, through-hole components on top layer, SMD components on bottom layer

Physical Prototype Images

Below is the second revision:

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Below is the first version — it had issues and was prone to MOSFET failure. The second version (above) has been fixed:

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High-frequency transformer:

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Testing and Performance Measurements

Initial Power-Up Test

During initial power-up testing, always connect a series incandescent bulb to limit current and prevent catastrophic failures in case of short circuits. The prototype worked as expected, producing an output voltage of 24.1V (tested under 0.9A load, shown below).

Purpose of the series light bulb: It acts as a current-limiting protective device. Under normal operation, the bulb’s resistance is low, so it only glows dimly or remains off, allowing normal testing. If a short circuit occurs inside the power supply, the current spikes, causing the bulb to drop most of the voltage due to its fixed resistance, thereby limiting current and protecting sensitive components from damage.

Switching power supply protection socket with built-in bulb: https://s.click.taobao.com/OiMyz3q

Alternatively, you can test using DC input. I verified that applying 60V DC allows the power supply to start up normally and output 24V. However, you must reduce the 200kΩ startup resistor (R24 + R16) to 100kΩ (by shorting one of them), otherwise the high resistance prevents startup at lower voltages.

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Efficiency Measurement

Test Equipment Used:

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Measured Data:

Input Voltage (V) Input Current (A) Apparent Input Power (W) Active Input Power (W) Output Voltage (V) Output Current (A) Output Power (W) Efficiency (%) Power Factor
219.85 0.029 6.38 2.10 24.13 0.00 — — 0.33
219.83 0.251 55.18 28.69 24.10 1.00 24.10 83.99 0.52
219.59 0.438 96.18 55.78 24.07 2.00 48.14 86.30 0.58
219.65 0.637 139.92 82.55 24.05 3.00 72.15 87.40 0.59
111.55 0.036 4.02 1.81 24.13 0.00 — — 0.45
111.13 0.406 45.12 28.88 24.10 1.00 24.10 83.46 0.64
110.89 0.753 83.50 56.78 24.06 2.00 48.12 84.75 0.68
110.58 1.097 121.31 84.91 24.00 3.00 72.00 84.79 0.70

Peak measured efficiency: 87.4%, with minimum no-load power consumption of 1.81W — slightly higher than ideal.

The above efficiency measurements were taken using diode rectification, not synchronous rectification, because the selected synchronous rectifier MOSFET had relatively high on-resistance, resulting in lower efficiency compared to diode rectification. You may replace it with a better MOSFET for testing — choose one rated for at least 200V breakdown voltage (or 150V if snubber resistors R9 and capacitors C8, each 20Ω and 2.2nF, are added across the diode).

Output Voltage Ripple Measurement

Oscilloscope used: Rigol DHO914S: https://blog.zeruns.com/archives/764.html

The oscilloscope probe was clipped onto approximately 15cm of output wiring, without using a ground spring or connecting directly across the output capacitor. As such, the measured ripple values may be somewhat inflated.

Ripple at no load: Peak-to-peak ~730mV, ripple frequency ~138.96kHz (close to switching frequency).

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Ripple under 3A load: Peak-to-peak ~562.08mV.

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MOSFET Waveforms

Primary-side MOSFET gate-source (GS) and drain-source (DS) voltage waveforms with 220V AC input and 24V output under 1A load. Yellow trace = gate-to-source voltage; Blue trace = drain-to-source voltage.

Note that the drain voltage spike during turn-off reaches ~440V (measurement was taken with the series bulb still connected — forgot to bypass the switch — so actual input voltage might have been only ~100+ V, meaning the real spike could be even higher).

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Zoomed-in view of gate voltage waveform:

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Output Rectifier Diode Waveforms

Output rectifier voltage waveform with 60V DC input, 24V output, no load — peak voltage spike ~56V.
(After adding 20Ω resistor R9 and 2.2nF capacitor C8 across the diode, spike drops to ~42V)

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With 60V DC input, 24V output, 1A load — peak voltage spike ~190V.
(After adding R9 and C8, spike reduces to ~81V)

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No-Load Startup Output Voltage

Output voltage waveform during startup with 60V DC input, 24V output, no load. Rise time from 0V to 24V is about 7 milliseconds.

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Thermal Performance

Thermal imaging of the bottom side under no load: Highest temperature (~60°C) observed at the startup resistor (ambient ~25°C), primary-side MOSFET ~48°C.

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Thermal imaging under 3A full load: Hottest spot (>88°C) located at either the primary-side MOSFET or the resistor in the RCD clamp circuit (ambient ~26°C). Secondary-side rectifier diode likely exceeds 60°C.

Temperature is quite high under full load. For long-term full-power operation, the primary-side switch MOSFET should be fitted with a heatsink or potted (encapsulated) to transfer heat to the enclosure!

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Component Purchase Links- SMD resistor and capacitor sample book: https://s.click.taobao.com/ngH2RGq

It is recommended to purchase components from LCSC (SZLCSC Mall): https://activity.szlcsc.com/invite/D03E5B9CEAAE70A4.html

In the BOM list of the open-source link on LCSC, click “Order Now” to import all required components directly into your shopping cart with one click.

Schematic Diagram

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PCB Layout

Top Layer

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Bottom Layer

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Download Resources

The following links contain resources such as: LCEDA project files, schematic PDFs, Gerber files for PCB fabrication, SMPSKit switching power supply design tool, flyback transformer calculation sheet (Mathcad), silkscreen diagrams, transformer manufacturing specifications, datasheets for all ICs, PSIM simulation models, Bode plot MATLAB code, and other reference materials and documents. (Some materials are collected from the internet.)

If you find this helpful, feel free to support me via donation through the 123 Cloud Pan link above. If reading this article on WeChat (Official Account: zeruns-gzh), you can also tap “Like Author” at the bottom of the article to donate. Thank you.

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Recommended Reading

English Version of the Article: https://blog.zeruns.top/archives/74.html

2 Likes
深圳梧桐山爬山记，深圳日落照片
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Wow, this is a great open-source project, with comprehensive documentation :+1:

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So strong! Must support!

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Hello, could you please let me know if you’ve done loop compensation in the simulation part, and how you derived the transfer function?

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No, I don’t know much about loop compensation.

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Hello, could you please explain how the values for the components in the blue box in the image (R19, R21, R17, C12) are calculated? I found through simulation and parameter tuning that they are also related to the sampling resistor R8 below the MOS source. When one parameter changes, the others need to be adjusted accordingly.

I calculated the sampling resistor using the formula 1V/(Ipk×1.2). With Ipk = 2.644A in your project, this gives 0.32Ω, which differs from the actual 0.2Ω used in your design. May I ask how you arrived at this set of parameters? I look forward to your reply. Thank you!

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Hello! It’s great to see your deep dive into this open-source project, having even run simulations and made very insightful observations—going straight to the heart of the core challenge in current mode control.

As an experienced power supply engineer, let me address your questions one by one. Let’s combine theory with practical engineering:

1. About the sense resistor R8 (0.32Ω vs 0.2Ω)

Your theoretical calculation formula R_{sense} = 1V / (I_{pk} \times 1.2) is absolutely correct. This is the standard recommended method found in textbooks and IC datasheets, providing a 20% safety margin. But why did I use 0.2Ω in practice?

There are several practical engineering considerations:

  • Power dissipation and heating (efficiency first): R8 is placed in series with the primary main current path, where RMS current is quite high. Using 0.32Ω (or the nearest standard value, 0.33Ω) would result in nearly double the I^2R losses compared to 0.2Ω. In compact, naturally cooled adapters, this temperature rise is significant.
  • Handling transients and startup surges: The calculated I_{pk} = 2.644A applies under steady-state full-load conditions at minimum input voltage. However, during cold start (charging large output capacitors) or sudden heavy load steps, we need the power supply to deliver higher peak current temporarily. With 0.2Ω, the per-cycle hardware current limit becomes 1V / 0.2\Omega = 5A. Provided that I’ve verified my transformer won’t saturate at 5A peak current.
  • Component standardization: 0.2Ω (200mΩ) in 1206 package is a widely available, low-cost value.
  • Summary: While 0.32Ω offers tighter protection in theory, in practice we often slightly reduce R_{sense} to improve efficiency and dynamic headroom—as long as the transformer remains unsaturated.

2. Why does the compensation network (R17/C12, etc.) need to change when R8 changes?

Your simulation observation is spot-on: “When you change R8, the other parameters must also be adjusted.”

This is because UC3842 is a peak current-mode controller. In current-mode control, the plant’s control-to-output transfer function (DC gain) is inversely proportional to the current sense resistor R_{sense} (your R8).
Simply put, reducing R8 changes the gain of the current loop, which shifts the entire system’s crossover frequency and phase margin. Therefore, the previously tuned voltage-loop compensation network (R17, C12, etc.) no longer works—it must be re-matched; otherwise, the power supply may oscillate (e.g., sub-harmonic oscillation or audible noise).

3. How were the values in the blue box (R19, R21, R17, C12) determined?

You asked how I derived the values for R19, R21, R17, and C12. Honestly speaking, it’s extremely difficult to calculate these precisely by hand when developing real products.

This involves multiple factors: TL431 compensation, optocoupler (PC817) transmission delay and current transfer ratio (CTR), and UC3842’s internal error amplifier compensation.

Here’s my actual development process (which is common industry practice):

  1. Initial estimation:

    • R13 and R14 (voltage divider) are calculated based on the 24V output.
    • R19 sets the optocoupler LED current; R21 provides bias current for TL431 (typically ensuring ~1mA minimum “dead” current through TL431).
    • On the UC3842 side, R17 and C12 form a Type-II compensator (providing one pole and one zero). For initial values, I pick rough RC values based on experience (e.g., R17 = 10k–20k, C12 = 1nF–10nF).

  2. Simulation verification (like what you’re doing now): Plug these initial values into Simplis or LTspice and run an AC sweep to examine the Bode plot. The goal is to set the crossover frequency between 1/10 and 1/5 of the switching frequency, while maintaining a phase margin greater than 45 degrees.

  3. Prototype testing and fine-tuning (the most critical step): No matter how perfect the simulation looks, real-world variations—such as CTR spread in the optocoupler, transformer leakage inductance, and PCB parasitic capacitance—affect the loop. Once the board is built, I apply a load transient using an electronic load (e.g., stepping from 10% to 90% load) and capture the output voltage waveform with an oscilloscope.

    • If there’s overshoot or ringing before settling, the phase margin is insufficient—I adjust C12 or R17 accordingly.
    • If the recovery is too slow, the bandwidth is too narrow—I fine-tune the RC values.

My suggestion for you:
Since you already have the simulation set up, try applying a step load (e.g., jumping from 0.5A to 3A) and observe the VOUT response. Then experiment with changing C12 (say, from 10nF to 1nF or 47nF) and watch how the overshoot and settling time change. This will give you an extremely intuitive understanding of how these components affect performance!

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Thank you very much